These monolithic, positive-edge-triggered flipflops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect ar the output. These flip-flops are guaranteed to respond to clock frequencies ranging form 0 to 30 megahertz while maximum clock frequency is typically 40 megahertz. Typical power dissipation is 39 milliwatts per flip-flop for the ′273 and 10 milliwatts for the ′LS273.
Features :-
- Contains Eight Flip-Flops With Single-Rail Outputs
- Buffered Clock and Direct Clear Inputs
- Individual Data Input to Each Flip-Flop
Specifications :-
- Supply Voltage : 4.75 – 5.25V
- High-level output current : -800µA
- Low-level output current : 16mA
- Clock frequency : 30MHz
- Width of clock or clear pulse : 16.5ns
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